library IEEE;
use IEEE.std_logic_1164.all;
use work.state_pkg.all;

entity motor_control is
  port (clk : in std_logic;
      reset : in std_logic;
      rover_direction : in direction_type;
      
		  motor_l_reset		: out	std_logic;
		  motor_l_direction	: out	std_logic;

		  motor_r_reset		: out	std_logic;
		  motor_r_direction	: out	std_logic
	);
end entity motor_control;


architecture behavioural of motor_control is
  signal previous_input, current_direction : direction_type;
  
begin
    process (clk)
    begin
        if (rising_edge (clk)) then
            if (reset = '1') then
                current_direction <= STOP;
                previous_input <= STOP;
            else
                if (previous_input = rover_direction) then
                    current_direction <= rover_direction;
                else
                    current_direction <= current_direction;
                end if;
                previous_input <= rover_direction;
            end if;
        end if;
    end process;
  
    with current_direction SELECT
      motor_l_reset <= '0' when STRAIGHT,
                       '0' when HARD_LEFT,
                       '0' when SOFT_RIGHT,
                       '0' when HARD_RIGHT,
                       '1' when others;
    with current_direction SELECT
      motor_l_direction <= '1' when STRAIGHT,
                           '1' when SOFT_RIGHT,
                           '1' when HARD_RIGHT,
                           '0' when others;
            
    with current_direction SELECT
      motor_r_reset <= '0' when STRAIGHT,
                       '0' when HARD_RIGHT,
                       '0' when SOFT_LEFT,
                       '0' when HARD_LEFT,
                       '1' when others;
    with current_direction SELECT
      motor_r_direction <= '0' when STRAIGHT,
                           '0' when SOFT_LEFT,
                           '0' when HARD_LEFT,
                           '1' when others;
           
end architecture behavioural;